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W588SXXX 8-BIT MCU WITH VOICE/MELODY SYNTHESIZER (PowerSpeechTM Series) Table of Contents1. 2. 3. 4. 5. GENERAL DESCRIPTION ............................................................................................................. 2 FEATURE ....................................................................................................................................... 3 PIN DESCRIPTION ........................................................................................................................ 4 BLOCK DIAGRAM.......................................................................................................................... 5 ELECTRICAL CHARACTERISTICS .............................................................................................. 5 5.1 5.2 5.3 6. Absolute maximum ratings ............................................................................................ 5 D.C. Characteristics ...................................................................................................... 6 A.C. Characteristics....................................................................................................... 6 TYPICAL APPLICATION CIRCUIT ................................................................................................ 7 6.1 6.2 DAC Mode Output ......................................................................................................... 7 PWM Mode Output........................................................................................................ 8 7. REVISION HISTORY...................................................................................................................... 9 -1- Publication Release Date: May 15, 2003 Revision A5 W588SXXX 1. GENERAL DESCRIPTION The W588Sxxx is a powerful microcontroller-based speech synthesizer with 3 channels of speech and melody for multi-tasking applications. The W588Sxxx provides slow mode operation and PWM output to help reduce the power consumption for longer battery life. Also, the W588Sxxx adopts the MDPCM, ADPCM or PCM algorithm to reproduce high quality sound outputs. Other powerful functions like IR carrier generation and event synchronization mechanism are provided to meet the requirements for more complicated multi-tasking applications. The W588Sxxx family contains several items with different playback duration as shown below: (@5-bit MDPCM algorithm, 6KHz sampling rate) ITEM W588S003 W588S006 W588S010 W588S013 W588S016 *Duration ITEM 4 sec. W588S020 7 sec. W588S025 12 sec. W588S030 16 sec. W588S040 20 sec. W588S050 Duration ITEM 25 sec. W588S060 29 sec. W588S080 32 sec. W588S100 50 sec. W588S120 58 sec. - Duration **ITEM 66 sec. W588S009 100 sec. W588S012 118 sec. W588S015 133 sec. - Duration Note: 12 sec. 16 sec. 20 sec. *: The duration time is based on 5-bit MDPCM at 6KHz sampling rate. The firmware library and program code have been excluded from user's ROM space for the duration estimation. **: W588S009, S012 and S015 are a little different in RAM and I/O definition. Meanwhile, PowerScriptTM dose not support either. -2- W588SXXX 2. FEATURE * * * Wide Operating voltage: 2.4 ~ 5.5 volt Build in 8-bit MCU core with powerful programmable capability System clock - 4 MHz at 2.4 ~ 5.5 volt - 8 MHz at 3.6 ~ 5.5 volt * F/W speech synthesis - 5-bit MDPCM, 4-bit ADPCM or 8-bit PCM algorithm can be used - Programmable sample rate * * Direct-drive PWM output to save power consumption (no support in W588S003 and W588S006) Built-in 3 timers for speech/melody synthesis and general purpose applications - 2 speech channels - 1 speech channel plus dual-tone melody - 2 voice melody channels * * * * Build in on-chip mixer Built-in 32 KHz crystal oscillator with divider for time-keeping application Provide Watch Dog Timer (WDT) Provide power management to save current consumption: - 4 ~ 8 MHz system clock, with Ring type oscillator - Slow mode to reduce power - Stop mode for stopping all IC operations * I/O configuration - W588S003 ~ W588S120: 16 I/O - W588S009, W588S012, W588S015: 4 In, 8 I/O, 4 Out * * * * * Shared ROM for voice, melody and program storage Provide IR carrier generation Built-in Serial Interface Manager (SIM) in W588S080 ~ W588S120 Support PowerScriptTM for developing codes in easy way. (No support in W588S009, S012, and S015) Full-fledged development system - - - - * Source-level ICE debugger (Assembly & PowerScriptTM format) Event synchronization mechanism Compatible with W566B/C & W567S system User-friendly GUI environment Available package form: - COB is essential - W588S003 ~ W588S120: LQFP48 - W588S009, S012, S015: QFP44 -3- Publication Release Date: May 15, 2003 Revision A5 W588SXXX 3. PIN DESCRIPTION NAME I/O DESCRIPTION VSS1 PWM+/DAC PWMVDD1 O O - Negative power supply for PWM PWM driver positive output / DAC output. PWM driver negative output Positive power supply for PWM * Input port. Each pin of IP0 can be configured as floating or pull-high input pin. It can generate a port interrupt. Any pin's status change of IP0 can wake up the chip from STOP mode. Only providing in W588S009, W588S012 and W588S015 * * * * IP0[7:4] I VDD /RESET X32I X32O TEST OP0[3:0] I I O I O Positive power supply Active low reset pin, to reset whole device. 32 KHz crystal oscillator with divider for time-keeping application 32 KHz crystal oscillator with divider for time-keeping application Test pin, internally pulled low. Output port. The pins of OP0 are Inverter-type output. (Only providing in W588S009, W588S012 and W588S015.) * I/O multiplexed port. As output port, the pins can be set as open-drain type or CMOS type. As input port, the pins can be set with pull-high resistor or not. Interrupt will be generated to release IC from STOP mode upon triggering. When BP0[7] is used as output pin, it can be the IR transmission carrier output for IR applications. I/O multiplexed port. As output port, the pins can be set as open-drain type or CMOS type. As input port, the pins can be set with pull-high resistor or not, and the generate interrupt request can be used to release IC from STOP mode. No providing in W588S009, W588S012 and W588S015. * BP0[3:0] BP0[7:4] I/O * * * BP1[7:0] * I/O * * VSS OSC I Negative power supply Connect ROSC to Vss to generate the master clock -4- W588SXXX 4. BLOCK DIAGRAM OSC X32I X32O I/O Timer generator Timer/ Counter IP0 [4:7] BP0 [0:7] BP1 [0:7] OP0 [0:3] RAM/ Register ROM MCU core DAC/ PWM DAC/SPK+ SPK- Notes: 1. 2. 3. IP0 and OP0 are only providing in W588S009, W588S012 and W588S015. BP1 is no providing in W588S009, W588S012 and W588S015. PWM is no providing in W588S003 and W588S006. 5. ELECTRICAL CHARACTERISTICS 5.1 Absolute maximum ratings PARAMETER SYMBOL CONDITIONS RATED VALUE UNIT Power Supply Input Voltage Storage Temp. Operating Temp. VDD-VSS VIN TSTG TOPR All Inputs - -0.3 to +7.0 VSS -0.3 to VDD +0.3 -55 to +150 0 to +70 V V C C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. -5- Publication Release Date: May 15, 2003 Revision A5 W588SXXX 5.2 D.C. Characteristics (VDD-VSS = 4.5V, Ta = 25C, No Load unless otherwise specified) PARAMETER Operating Voltage Operating Current Standby Current (STOP) Slow Mode Current 32KHz Crystal Current Input Low Voltage Input High Voltage Input Current (IP0, BP0) Output Current (BP0) Output Current (OP0) Output Current SPK0+ / SPK0DAC Full Scale Current Pull-low Resistor Test SYM. VDD IOP1 IDD1 Iop2 I32K VIL VIH IIN IOL IOH IOL IOH IOL1 IOH1 CONDITIONS No load, Fosc = 4 MHz No load No load, Fosc = 4 MHz, CPU clock = Fosc / 128, Fosc disable, No load, Wake up frequency: 2Hz All Input Pins All Input Pins VIN = 0V VDD = 3V, VOUT = 0.4V VDD = 3V, VOUT = 2.6V VDD = 3V, VOUT = 0.4V VDD = 3V, VOUT = 2.6V RL=8 Ohm, [SPK+]----[RL]----[SPK-] RL = 100 MIN. 2.4 VSS 0.7 VDD -15 8 -4 4 -4 +200 -200 -2.4 -4.0 50 TYP. 3 1 6 -3.0 -5.0 - MAX. 5.5 5 2 200 15 0.3 VDD VDD -45 -3.6 -6.0 150 UNIT V mA A A A V V A mA mA mA mA mA mA mA K IDAC RPL 5.3 A.C. Characteristics (VDD-VSS= 4.5 V, Ta = 25C, No Load unless otherwise specified) PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT Main-clock Frequency Main-clock Wake-up Delay Frequency Deviation by Voltage Drop Main Oscillator, Ring Cycle Time Reset Signal Width FM WDm F F *ROSC = 300 Kohm *ROSC = 160 Kohm Ring type, CPU clock = 4MHz CPU clock = 4MHz, 3.6 7.2 - 4 8 3 4.4 8.8 5 MHz mS Tcyc TRST FMAX - FMIN FMIN CPU clock = 4MHz FM is enabled 250 4 3 - 7.5 DC - % nS Clocks of FM *: Typical ROSC value for each part number should refer to design guide. -6- W588SXXX 6. TYPICAL APPLICATION CIRCUIT 6.1 DAC Mode Output W 588S D A C Type VDD + - 4 .7 u F 10 VDD1 0 .1 u F B P00 | B P07 OSC ROSC X 32I 32K B P10 | B P17 W 588S VDD Speaker SPK+ X 32O SPKVSS VSS1 / Rs 8050 /R E S E T 0 .1 u F VSS VSS1 -7- Publication Release Date: May 15, 2003 Revision A5 W588SXXX Typical Application Circuit, continued 6.2 PWM Mode Output W 588S P W M Type VDD + - 4. 7u F 10 VDD1 0. 1u F B P 00 | B P 07 OSC R OSC X 32I 32K B P 10 | B P 17 W 588S X 32O /R E S E T 0. 1u F SPK+ SPK- S pe a ke r VSS1 VSS Notes: 1. 2. 3. 4. 5. 6. 7. The typical value of Rosc is 160 K for 8MHz and 300 K for 4MHz and should be connected to GND (VSS). Please refer to design guide to get typical Rosc value for each part number. In PCB layout, VSS1 should be connected to VSS; VDD1 should be connected to VDD. The Rs value is suggested in 270 ~ 1K to limit too large SPK+ output current flowing into transistor. The capacitor, 0.1uF, shunted between VDD/VDD1 and GND (VSS/VSS1) is necessary. The 10 and 4.7uF between VDD, VDD1 and GND are optional to reduce probability of latch-up occurring. The above application circuits are for reference only. No warranty for mass production. -8- W588SXXX 7. REVISION HISTORY REVISION DATE MODIFICATIONS A1 A2 A3 A3.1 April 2002 May 2002 July 11, 2002 Aug. 8, 2002 Preliminary release. Feature modifications. Wording modification. Create part number: W588S010, S013, S016 No support PWM in W588S003/006 (page 2) SIM only for W588S080~120 (page 2) Modify package form (page 2) Define ROSC value (page 6) Modify item list table in page1 and separate W588S009~S015 RTC 32 KHz crystal .... (page 2 and page 3) A4 Oct. 15, 2002 A5 May 15, 2003 Update slow mode current in maximum value Add 32 KHz crystal current value Modify application circuit in DAC and PWM (page 6) Headquarters No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5665577 http://www.winbond.com.tw/ Winbond Electronics Corporation America 2727 North First Street, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-5441798 Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Taipei Office 9F, No.480, Rueiguang Rd., Neihu Chiu, Taipei, 114, Taiwan, R.O.C. TEL: 886-2-8177-7168 FAX: 886-2-8751-3579 Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners. -9- Publication Release Date: May 15, 2003 Revision A5 |
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